Design Bcd to 7 Segment Decoder Using Logic Gates
BCD to 7-Segment Decoder

Abstract and Figures
p>This paper mainly studies the effect of binary algorithm and truth table on digital circuit, and analyzes its logic circuit (from 0 to 9). Binary algorithm is used to make its truth table, draw the circuit diagram and make its PCB template.</p
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ORIGINAL ARTICLE
134 | Yunman Hao Electronics Science Technology and Application
BCD to 7-Segment Decoder
Yunman Hao*
University of Central Lancashire, Preston PR12HE, UK. E-mail: 2924527459@qq.com
Abstract: This paper mainly studies the effect of binary algorithm and truth table on digital circuit, and analyzes its lo g-
ic circuit (from 0 to 9). Binary algorithm is used to make its truth table, draw the circuit diagram and make its PCB
template.
Keywords: Circuit Design; Truth Table; 7-Segment Display; K-map; Experiment
1. Introduction of this experiment
With the development of science and technology,
the application field of diode is more and more extensive.
The main advantages of diode are small size, low price,
various colors, long service life, easy access, and easy
interface with various other digital circuits and electronic
components. Due to their small chip size, so many of
them can be connected together in a compact and small
package to produce, which is commonly referred to as
a 7-segment display. Therefore, we will study the work-
ing principles of decimal numbers displayed in
the 7-terminal decoder.
For the first step, we should convert the 4-bit code
into 7-bit control signal, so we drew the truth table which
is needed for the experiment (we made A the highest
position).
Table 1
Copyright © 2020 Yunman Hao
doi: 10.18686/esta.v7i4.160
This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License
(http://creativecommons.org/licenses/by-nc/4.0/), which permits unrestricted non-commercial use, distribution, and reproduction in any medium,
provided the original work is properly cited.
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 135
The ten lines of the capital letter A, B, C, D in the
truth table represent Arabic numbers 0 to 9 respectively.
The lowercase letters a, b, c, d, e, f and g respectively
represent 7 LEDs that can emit light. When A is 1, it
means A is in an open state. When A is 0, it means A is
closed. When the number below the lowercase letter is 1,
the corresponding diode receives the signal, and the di-
ode lights up at this time. When its corresponding num-
ber is 0, the diode does not receive the signal, and the
diode turns off the lamp. The lowercase letters a, b, c, d,
e, f and g represent seven diodes respectively, and the
corresponding mode is shown in the following Figure 1.
Different codes can make different diodes light up to
form the numbers 0 to 9, thus completing the experi-
ment[1] .
We used K-map to simplify the code, and the most
simplified formula is the connection mode of the circuit.
Figure 1
2. Circuit design
The following formulas are the specific operation
results: ("*" is AND; "+" is OR )
Notice that: (A+C)!=A!*C!; (AC)!=A!+C!
a = A+C+BD+B!D!
=[( A+C+BD+B!D!)!]!
=[A!*C!*(BD+B!D!)!]!
=[A!*C!*(BD)!*(B!D!)!]!
This is my circuit design
:
And this circuit can test the state of "a" when we
enter any number from zero to nine. If we put 1 into this
circuit A is 0, B is 0, C is 0 and D is 1. It means A, B and
C are off but D is open. At this time, diode "a"
isn't bright. When we put 2 in the circuit, it means A is 0,
B is 0, C is 1 and D is 0. At this time, diode of "a"
is bright.
136 | Yunman Hao Electronics Science Technology and Application
Figure 2
Figure 3
Next is "b":
b = A+A!B!+C!D!+CD
= [(A+A!B!+C!D!+CD)!]!
= [A!*(A!B!+C!D!+CD)!]!
= [A!*(A!B!)!*(C!D!+CD)!]!
= [A!*(A!B!)!*(C!D!)!*(CD)!]!
This is my circuit design:
When we open B and C, it means we enter the
number "6" into the circuit. At this time, diode "b" is
not bright. When we open B, it means we enter the num-
ber "4". At this time, diode "b" is bright.
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 137
Figure 4
Figure 5
Next is "c":
c= B+A+D+C! =[(B+A+D+C!)!]!
=(B!*A!*D!*C)!
138 | Yunman Hao Electronics Science Technology and Application
This is my circuit design:
When I enter number 3, it shows:
Figure 6
When I enter number 2, it shows:
Figure 7
Notice that NAND=NOT+AND
Then is "d":
d = A+CD!+B!D!+C!DB+B!C
=[(A+CD!+B!D!+C!DB+B!C)!]!
=[A!*(CD!+B!D!+C!DB+B!C)!]!
=[A!*(CD!)!*(B!D!+C!DB+B!C)!]!
=[A!*(CD!)!*(B!D!)*(C!DB+B!C)!]!
=[A!*(CD!)!*(B!D!)*(C!DB)!*(B!C)!]!
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 139
This is my circuit design:
When I enter number 7:
Figure 8
When I enter number 3:
Figure 9
140 | Yunman Hao Electronics Science Technology and Application
Next is "e":
e =B!D!+CD!+AB+AC
=[(B!D!+CD!+AB+AC)!]!
=[(B!D!)!*(CD!+AB+AC)!]!
=[(B!D!)!*(CD!)!*(AB+AC)!]!
=[(B!D!)!*(CD!)!*(AB)!*(AC)!]!
This is my circuit design:
When I enter number 4:
Figure 10
When I enter number 6:
Figure 11
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 141
Next is "f":
f=A+C!D!+BC!+BD!
=[(A+C!D!+BC!+BD!)!]!
=[A!*(C!D!+BC!+BD!)!]!
=[A!*(C!D!)!*(BC!+BD!)!]!
=[A!*(C!D!)!*(BC!)!*(BD!)!]!
This is my circuit design:
When I enter number 4:
Figure 12
142 | Yunman Hao Electronics Science Technology and Application
When I enter number 1:
Figure 13
Final is "g":
g=A+BC!+B!C+CD!
=[(A+BC!+B!C+CD!)!]!
=[A!*(BC!+B!C+CD!)!]!
=[A!*(BC!)!*(B!C+CD!)!]!
=[A!*(BC!)!*(B!C)!*(CD!)!]!
This is my circuit design:
When I enter number 0:
Figure 14
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 143
When I enter number 8:
Figure 15
3. The package diagram of the total
circuit
Now we have completed the operation of seven di-
odes. When these seven diodes are connected together,
the connection of the overall circuit is completed. The
specific connection method is shown in the following
Figure 16:
Figure 16
After the previous simplification and connection
circuit, we have obtained the connection mode of 7 di-
odes. We only need to connect these 7 circuits together to
obtain a total circuit. This circuit consists of NAND gate,
which can encode 4-bit signal into 7-bit 2-signal and
output it to the display. Note that the compilation in this
experiment uses binary numbers, only 0 and 1. When the
input signal is 1, the switch representing this position is
turned on, and the input terminal will generate an ele c-
trical signal and transmit it to the compiling part. After
compiling, the compiling result will be output to the co r-
responding diode, so that the seven diodes will be co m-
bined into a digital shape, and the experiment will be
completed[2] .
Let's give an example. When the switch A at the
signal input is open, B is closed, C is closed, and D is
open. The digital Europe that I choose is represented as
0110 in binary, which translates to 6 in decimal, that is, 6
should be A, C, D, E, F and G which are bright, and B is
not bright on the diode. In other words, the 0110 I input
will be transmitted to the 7 circuits I designed. These 7
circuits are equivalent to 7 decoders, which compile the
instruction 0110. The result of A compilation is 1, so A
is bright. The compilation result of bar is 0, so b is
not bright. The compilation results of c, d, e, f and g are
all 1, so the diodes c, d, e, f and g are all bright, and the
144 | Yunman Hao Electronics Science Technology and Application
corresponding signals are finally output to 7 correspond- ing diodes, forming the number 6.
Figure 17
Finally, because of the large volume of the main
store road, we packaged the circuit, reducing the volume
of the circuit and playing the role of protection[3]. Since
the NAND gate in my software was not packaged, the
package diagrams of 74LS00 and 74LS20 were selected
in the circuit diagrams I connected.
Figure 18
References
1. Tocci RJ, Widmer NS. Digital systems: Principles
and applications. 8th ed. New Jersey: Prentice Hall;
2000. p. 106– 262.
2. Nelson VP, Carroll BD, Nagle HT, et al. Digital
logic circuit analysis and design. 2nd ed. Prentice
Hall; 1995. p. 329– 346.
Electronics Science Technology and Application Volume 7 Issue 4 | 2020 | 145
3. Evens A. Logic of the digital. London: Bloomsbury Academic; 2017. p. 1– 192.
ResearchGate has not been able to resolve any citations for this publication.
- Aden Evens
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Design Bcd to 7 Segment Decoder Using Logic Gates
Source: https://www.researchgate.net/publication/348963148_BCD_to_7-Segment_Decoder
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